[D-2-5] Robust Flip-Flop against Soft Errors for Combinational and Sequential Logic Circuits

T. Uemura¹、Y. Tosaka¹、H. Matsuyama¹、K. Takahisa²、K. Hatanaka² (1.Fujitsu Microelectronics Ltd.、2.Osaka Univ., Japan)

https://doi.org/10.7567/SSDM.2008.D-2-5