The Japan Society of Applied Physics

[A-4-2] Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors using Ion Implantation Induced Relaxation Technique of Strained-Substrates

T. Mizuno1,2, N. Mizoguchi1, K. Tanimoto1, T. Yamauchi1, T. Tezuka3, T. Sameshima4 (1.Kanagawa Univ.(Japan), 2.MIRAI-NIRC(Japan), 3.MIRAI-Toshiba(Japan), 4.Tokyo Univ. of Agri. And Tech.(Japan))

https://doi.org/10.7567/SSDM.2009.A-4-2