[B-5-2] Effect of Post Cap-Layer Deposition Annealing Temperature and TiN Thickness on SMDH CMOS Process using TiN Hard Mask

H. Shinohara¹, A. Katakami¹, T. Watanabe¹, M. Hayashi¹, S. Kamiyama¹, Y. Sugita¹, T. Matsuki¹, T. Eimori¹, J. Yugami¹, K. Ikeda¹, Y. Ohji¹ (1.Selete)

https://doi.org/10.7567/SSDM.2009.B-5-2