[P-2-6] Low-Temperature Silicon Oxide Offset Spacer using Plasma Enhanced Atomic Layer Deposition for High-k/Metal Gate Transistor

T. Murata¹, Y. Miyagawa¹, Y. Nishida¹, Y. Yamamoto¹, T. Yamashita¹, M. Matsuura¹, K. Asai¹ (1.Renesas Tech. Corp.)

https://doi.org/10.7567/SSDM.2009.P-2-6