[C-5-3] Heavily-Doped Poly-Si Gate and Epi-First Source/Drain Extension Technique in Strained Si Nanowire MOSFETs with Reduced Papasitic Resistance

Y. Nakabayashi¹、M. Saitoh¹、T. Ishihara¹、T. Numata¹、K. Uchida²、J. Koga¹ (1.Toshiba Corp.、2.Tokyo Inst. of Tech. , Japan)

https://doi.org/10.7567/SSDM.2010.C-5-3