The Japan Society of Applied Physics

[D-6-2] Towards Optical Networks-on-Chip Using CMOS Compatible III-V/SOI Technology

L. Grenouillet1, P. Philippe1, J. Harduin1, N. Olivier1, P. Grosse1, L. Liu2,3, T. Spuesens2, P. Régreny4, F. Mandorlo4, P. Rojo-Romeo4, R. Orobtchouk4, D. Van Thourhout2, J. M. Fedeli1 (1.CEA-LETI/MINATEC , FRANCE, 2.Ghent Univ. , BELGIUM, 3.Technical Univ. of Denmark , DENMARK, 4.Institut des Nanotechnologies de Lyon INL , FRANCE)

https://doi.org/10.7567/SSDM.2010.D-6-2