[E-1-3] A Study of a Data Retention Characteristic for Various Schemes of Gate Oxide Formation in Sub-50-nm Saddle-Fin Transistor DRAM Technology

S. W. Ryu¹, S. K. Chun¹, T. Jang¹, B. Lee¹, D. Lee¹, M. Yoo¹, S. Cha¹, J. G. Jeong¹, S. J. Hong¹ (1.Hynix Semiconductor Inc. , Korea)

https://doi.org/10.7567/SSDM.2010.E-1-3