[P-3-3] Technology Computer Aided Design of 65nm SOI MOSFETs through Integrated Process and Device Simulations
E. M. Bazizi1,2, P. F. Fazzini1, F. Cristiano1, A. Pakfar2, C. Tavernier2, C. Zechner3, N. Zographos3, A. Claverie1
(1.CNRS-LAAS, 2.STMicroelectronics , France, 3.Synopsys Switzerland LLC LEMES/CNRS , Switzerl)
https://doi.org/10.7567/SSDM.2010.P-3-3