The Japan Society of Applied Physics

[C-3-3] Performance Evaluation of a Logic-IP Compatible (LIC) Embedded DRAM with Cylinder Capacitors in Low-k/Cu BEOL Layers

I. Kume1, N. Inoue1, K. Hijioka1, J. Kawahara1, K. Takeda1, N. Furutake1, H. Shirai1, K. Kazama1, S. Kuwabara1, M. Watarai1, T. Sakoh1, T. Takahashi1, T. Ogura1, T. Taiji1, Y. Kasama1, M. Sakamoto1, M. Hane1, Y. Hayashi1 (1.Renesas Electronics Corp. , Japan)

https://doi.org/10.7567/SSDM.2011.C-3-3