[D-1-2] Accurate and Ready-to-use Parasitic Capacitances Models for Advanced 2D/3D CMOS Device Structure Comparison
J. Lacord1,2, D. Hoguet1, D. Rideau1, G. Ghibaudo2, F. Boeuf1
(1.STMicroelectronics, 2.IMEP-LAHC , France)
https://doi.org/10.7567/SSDM.2011.D-1-2