[D-1-4] A Stacked Inverter-based CMOS Power Amplifier in 65nm CMOS Process

H. Kiumarsi¹、Y. Mizuochi¹、H. Ito¹、N. Ishihara¹、K. Masu¹ (1.Tokyo Tech , Japan)

https://doi.org/10.7567/SSDM.2011.D-1-4