[D-1-4] A Stacked Inverter-based CMOS Power Amplifier in 65nm CMOS Process H. Kiumarsi1, Y. Mizuochi1, H. Ito1, N. Ishihara1, K. Masu1 (1.Tokyo Tech , Japan) https://doi.org/10.7567/SSDM.2011.D-1-4