A Novel Operating Scheme for 2-bit/Cell Split Gate SONOS Flash Memory

C. H. Chou; S. S. Chung; C. H. Lee; T. M. Hsieh; J. C. Liou; C. H. Chen; P. ZP. Chen; H. H. Chen

doi:https://doi.org/10.7567/SSDM.2011.F-5-1

2011 International Conference on Solid State Devices and Materials

2011年9月27日〜 2011年9月30日
Aichi Industry & Labor Center (WINC AICHI), Nagoya, Japan

[F-5-1] A Novel Operating Scheme for 2-bit/Cell Split Gate SONOS Flash Memory

C. H. Chou¹、S. S. Chung¹、C. H. Lee²、T. M. Hsieh²、J. C. Liou²、C. H. Chen³、P. ZP. Chen³、H. H. Chen³ (1.National Chiao Tung Univ.、2.Solid State System、3.UMC , Taiwan)

https://doi.org/10.7567/SSDM.2011.F-5-1

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