[P-4-2] Improved electrical properties of charge trap flash memories having a patterned surface in a Si3N4 trap layer
H. M. An1, J. W. Yang1, H. D. Kim1, J. W. Son2, W. J. Cho2, T. G. Kim1
(1.Korea Univ., 2.Kwangwoon Univ. , Korea)
https://doi.org/10.7567/SSDM.2011.P-4-2