[PS-5-7] A Dynamic Comparator Using Dynamic Currents of CMOS Logic Gates for Low-Power and High-Efficient Offset Calibration

C. Masuda¹, T. Hirose¹, Y. Osaki¹, N. Kuroki¹, M. Numa¹ (1.Kobe Univ. , Japan)

https://doi.org/10.7567/SSDM.2012.PS-5-7