Low Frequency Noise Analysis of ZnO TFTs under the Positive Gate Bias Stress

K. S. Jeong; Y. M. Kim; H. J. Yun; S. D. Yang; S. Y. Lee; Y. S. Kim; H. D. Lee; G. W. Lee

doi:https://doi.org/10.7567/SSDM.2012.PS-6-19

2012 International Conference on Solid State Devices and Materials

Sep 25, 2012 - Sep 27, 2012
Kyoto International Conference Center, Kyoto, Japan

[PS-6-19] Low Frequency Noise Analysis of ZnO TFTs under the Positive Gate Bias Stress

K. S. Jeong¹, Y. M. Kim¹, H. J. Yun¹, S. D. Yang¹, S. Y. Lee¹, Y. S. Kim², H. D. Lee¹, G. W. Lee¹ (1.Univ. of Chung-nam National, 2.National Nanofab Center , Korea)

https://doi.org/10.7567/SSDM.2012.PS-6-19

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