[A-2-3] A New Lateral Conductive Bridge Random Access Memory (L-CBRAM) by Fully CMOS Logic Compatible Process

Y.C. Lin¹, Y.W. Chin¹, M.C. Hsieh¹, Y.D. Chih², K.H. Tsai³, M.J. Tsai³, Y.C. King¹, C.J. Lin¹ (1.National Tsing-Hua Univ., 2.Taiwan Semiconductor Manufacturing Company, 3.Industrial Technology Research Inst. (Taiwan))

https://doi.org/10.7567/SSDM.2013.A-2-3