The Japan Society of Applied Physics

[B-1-2] Thermal and Plasma Treatments for Improved (Sub-)1nm EOT Planar and FinFET-based RMG High-k Last Devices and Enabling a Simplified Scalable CMOS Integration Scheme

A. Veloso1、G. Boccardi1、L.A. Ragnarsson1、Y. Higuchi2、H. Arimura1,3、J.W. Lee1,3、E. Simoen1、M.J. Cho1、Ph.J. Roussel1、V. Paraschiv1、X. Shi1、T. Schram1、S.A. Chew1、S. Brus1、A. Dangol1、E. Vecchio1、F. Sebaai1、K. Kellens1、N. Heylen1、K. Devriendt1、H. Dekkers1、A. Van Ammel1、T. Witters1、T. Conard1、I. Vaesen1、O. Richard1、H. Bender1、R. Athimulam1、A. Thean1、N. Horiguchi1 (1.Imec、2.Panasonic、3.K. U. Leuven (Belgium))

https://doi.org/10.7567/SSDM.2013.B-1-2