The Demonstration of Complementary Tunnel FET with Vertical Tunneling Junction Structure Compatible with Si CMOS Platform

Y. Kondo; M. Goto; K. Miyano; A. Hokazono; T. Miyata; E. Sugizaki; K. Adachi; T. Ohguro; S. Kawanaka; Y. Toyoshima

doi:https://doi.org/10.7567/SSDM.2013.D-7-1

[D-7-1] The Demonstration of Complementary Tunnel FET with Vertical Tunneling Junction Structure Compatible with Si CMOS Platform

Y. Kondo¹, M. Goto¹, K. Miyano¹, A. Hokazono¹, T. Miyata¹, E. Sugizaki¹, K. Adachi¹, T. Ohguro¹, S. Kawanaka¹, Y. Toyoshima¹ (1.Semiconductor & Storage Products Company, Toshiba Corp. (Japan))

https://doi.org/10.7567/SSDM.2013.D-7-1

2013 International Conference on Solid State Devices and Materials

[D-7-1] The Demonstration of Complementary Tunnel FET with Vertical Tunneling Junction Structure Compatible with Si CMOS Platform