[M-3-3] Gate Oxide Reliability on Large-Area Surface Defects in 4H-SiC Epitaxial Wafers
O. Ishiyama1, K. Yamada1, H. Sako1, K. Tamura1, M. Kitabatake1, J. Senzaki1,2, H. Matsuhata1,2
(1.R&D Partnership for Future Power Electronics Tech., 2.AIST (Japan))
https://doi.org/10.7567/SSDM.2013.M-3-3