The Japan Society of Applied Physics

[PS-5-7] Design Optimization Methodology for Ultra Low Power Analog Circuits using Intuitive Inversion-level and Saturation-level Parameter

T. Eimori1、K. Anami1、N. Yoshimatsu1、T. Hasebe2、K. Murakami1,3 (1.Institute of Systems, Information Technologies and Nanotechnologies、2.Qualiarc Technology Solutions,Inc.、3.Kyushu Univ. (Japan))

https://doi.org/10.7567/SSDM.2013.PS-5-7