[E-4-2] 3.3-kV Double Channel-Doped SiC Vertical JFET in Cascode Configuration

H. Shimizu¹、S. Akiyama¹、N. Yokoyama¹、A. Shima¹、Y. Shimamoto¹ (1.Hitachi Ltd. (Japan))

https://doi.org/10.7567/SSDM.2014.E-4-2