[J-3-4] High Reliability SRAM Development for 40nm Embedded Spilt Gate-MONOS
S. Okamoto1, K. Maekawa2, Y. Kawashima1, K. Shiba2, H. Sugiyama1, M. Inoue1, A. Nishida1
(1.Renesas Electronics Corp., 2.Renesas Semiconductor Manufacturing Co., Ltd. (Japan))
https://doi.org/10.7567/SSDM.2014.J-3-4