The Japan Society of Applied Physics

[K-1-2] Flip-Flop Circuits using Fully Solution Processed Pseudo-CMOS Circuits

Y. Takeda1,2, Y. Yoshimura1,2, F.A. Ezarudin Bin Adib3, K. Fukuda1,2, D. Kumaki1,2, S. Tokito1,2 (1.Graduate School of Science and Engineering, Yamagata Univ., 2.ROEL, Yamagata Univ., 3.SATO HOLDINGS Corp., Ltd (Japan))

https://doi.org/10.7567/SSDM.2014.K-1-2