09:30 〜 09:50
[E-6-2] Evaluation of 2-D Local Stress Distribution in Stacked IC Chip Using Stress-Induced Retention Time Modulation of DRAM Cell Array
○S. Tanikawa1, H. Hashiguchi1, Y. Sugawara1, H. Kino1, T. Fukushima1, M. Koyanagi1, T. Tanaka1
(1.Tohoku Univ.(Japan))
https://doi.org/10.7567/SSDM.2015.E-6-2
