09:40 〜 10:00

[F-6-3] Digitally Calibrated Dynamic Latched Comparator with Stochastic Offset Voltage Detection Technique for Low-Power ADCs

^○T. Okazawa¹, T. Kawano¹, M. Ishida^1,2, I. Akita¹ (1.Toyohashi Tech, 2.Electronics-Inspired Interdisciplinary Res. Inst. (EIIRIS)(Japan))

https://doi.org/10.7567/SSDM.2015.F-6-3