The Japan Society of Applied Physics

9:40 AM - 10:00 AM

[F-6-3] Digitally Calibrated Dynamic Latched Comparator with Stochastic Offset Voltage Detection Technique for Low-Power ADCs

T. Okazawa1, T. Kawano1, M. Ishida1,2, I. Akita1 (1.Toyohashi Tech, 2.Electronics-Inspired Interdisciplinary Res. Inst. (EIIRIS)(Japan))

https://doi.org/10.7567/SSDM.2015.F-6-3