Ω-Gate Nanowire Transistors Realized by Sidewall Image Transfer Patterning: 35nm Channel Pitch and Opportunities for Stacked-Nanowires Architectures

L. Gaben

doi:https://doi.org/10.7567/SSDM.2015.N-2-2

4:25 PM - 4:45 PM

[N-2-2] Ω-Gate Nanowire Transistors Realized by Sidewall Image Transfer Patterning: 35nm Channel Pitch and Opportunities for Stacked-Nanowires Architectures

^○L. Gaben^1,2,3, S. Barraud¹, P. Pimenta- Barros¹, Y. Morand², J. Pradelles¹, M. P. Samson², B. Previtali¹, P. Besson², F. Alain¹, S. Monfray², F. Boeuf², T. Skotnicki², BalestraF. ³, M. Vinet¹ (1.CEA-LETI, Minatec Campus, 2.STMicroelectronics, 3.IMEP-LAHC(France))

https://doi.org/10.7567/SSDM.2015.N-2-2

2015 International Conference on Solid State Devices and Materials

[N-2-2] Ω-Gate Nanowire Transistors Realized by Sidewall Image Transfer Patterning: 35nm Channel Pitch and Opportunities for Stacked-Nanowires Architectures