10:30 〜 10:50
[B-3-05] Multi-level Operation of a High-speed, Low Power Topological Switching Random-access Memory (TRAM) Based on a Ge Deficient GexTe/Sb2Te3 Superlattice
○H. Shirakawa1, M. Takato1, M. Araidai1,2, T. Ohyanagi3, N. Takaura3, K. Shiraishi1
(1.Nagoya Univ.(Japan), 2.JST-CREST(Japan), 3.Hitachi, Ltd.(Japan))
https://doi.org/10.7567/SSDM.2016.B-3-05