Multi-level Operation of a High-speed, Low Power Topological Switching Random-access Memory (TRAM) Based on a Ge Deficient GexTe/Sb2Te3 Superlattice

H. Shirakawa

doi:https://doi.org/10.7567/SSDM.2016.B-3-05

10:30 AM - 10:50 AM

[B-3-05] Multi-level Operation of a High-speed, Low Power Topological Switching Random-access Memory (TRAM) Based on a Ge Deficient Ge_xTe/Sb₂Te₃ Superlattice

^○H. Shirakawa¹, M. Takato¹, M. Araidai^1,2, T. Ohyanagi³, N. Takaura³, K. Shiraishi¹ (1.Nagoya Univ.(Japan), 2.JST-CREST(Japan), 3.Hitachi, Ltd.(Japan))

https://doi.org/10.7567/SSDM.2016.B-3-05

2016 International Conference on Solid State Devices and Materials

[B-3-05] Multi-level Operation of a High-speed, Low Power Topological Switching Random-access Memory (TRAM) Based on a Ge Deficient GexTe/Sb2Te3 Superlattice

[B-3-05] Multi-level Operation of a High-speed, Low Power Topological Switching Random-access Memory (TRAM) Based on a Ge Deficient Ge_xTe/Sb₂Te₃ Superlattice