Stacked-Wires FETs for Advanced CMOS Scaling

S. Barraud

doi:https://doi.org/10.7567/SSDM.2017.E-2-01

15:40 〜 16:10

[E-2-01 (Invited)] Stacked-Wires FETs for Advanced CMOS Scaling

^○S. Barraud¹, V. Lapras¹, M. P. Samson², B. Previtali¹, J. M. Hartmann¹, N. Rambal¹, C. Vizioz¹, V. Loup¹, C. Comboroure², F. Triozon¹, N. Bernier¹, D. Cooper¹, M. Vinet¹ (1.CEA-Leti (France), 2.STMicroelectronics (France))

https://doi.org/10.7567/SSDM.2017.E-2-01

2017 International Conference on Solid State Devices and Materials

[E-2-01 (Invited)] Stacked-Wires FETs for Advanced CMOS Scaling