9:30 AM - 10:00 AM
[E-5-01 (Invited)] Improvement of Device and Circuit Performance of Si-based Tunnel Field-Effect Transistors by Utilizing Isoelectronic Trap Technology
○T. Mori1, H. Asai1, T. Matsukawa1
(1.AIST (Japan))
https://doi.org/10.7567/SSDM.2017.E-5-01