Enhanced-Mode InAs QWFETs with the Source Connected Field Plate Technique for Low Power Logic Applications

J. N. Yao

doi:https://doi.org/10.7567/SSDM.2017.N-1-04

2:30 PM - 2:45 PM

[N-1-04] Enhanced-Mode InAs QWFETs with the Source Connected Field Plate Technique for Low Power Logic Applications

^○J. N. Yao¹, Y. C. Lin¹, H. T. Hsu¹, T. J. Huang¹, M. S. Lin², Y. C. Wang¹, Z. Y. Huang¹, S. M. Sze¹, E. Y. Chang¹ (1.National Chiao Tung Univ. (Taiwan), 2.National Tsing Hua Univ. (Taiwan))

https://doi.org/10.7567/SSDM.2017.N-1-04

2017 International Conference on Solid State Devices and Materials

[N-1-04] Enhanced-Mode InAs QWFETs with the Source Connected Field Plate Technique for Low Power Logic Applications