[PS-6-11] Electrical Performances of 1T-DRAM based on PNPN Tunneling FET with asymmetric Double-Gate Structure

^○Y. J. Yoon¹, J. H. Seo¹, M. S. Cho¹, B. G. Kim¹, I. M. Kang¹ (1.Kyungpook National Univ. (Korea))

https://doi.org/10.7567/SSDM.2017.PS-6-11