3:15 PM - 3:30 PM

[H-1-05] 85% Endurance Error Reduction by Changing Reset Voltage in 40nm TaO_X-based ReRAM

^○H. Kinoshita¹, S. Fukuyama¹, T. Yonai¹, R. Yasuhara², K. Takeuchi¹ (1.Chuo Univ. (Japan), 2.Panasonic Semiconductor Solutions Co., Ltd. (Japan))

https://doi.org/10.7567/SSDM.2019.H-1-05