The 74th JSAP Autumn Meeting,2013

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Oral presentation

11. Superconductivity » 11.5 Junction, circuit fabrication process and digital applications

[16p-C10-1~10] 11.5 Junction, circuit fabrication process and digital applications

Mon. Sep 16, 2013 2:00 PM - 4:45 PM C10 (TC3 2F-207)

2:30 PM - 2:45 PM

△ [16p-C10-3] Development of low-power shift-register memories with Josephson junction biasing

○Ryo Numguchi1, Akitomo Takahashi1, Yuki Yamanashi1, Nobuyuki Yoshikawa1 (Yokohama National Univ1)

Keywords:SFQ,memory,shift register