[19a-D8-1~13] 14.3 Electron devices and Process technology

[19a-D8-1] Calculation of ultimate on-resistance in GaN lateral HFETs using device simulation

^○Kazuma Terayama¹, Akira Nakajima², Shinichi Nishizawa², Hiromichi Ohasi², Kuniyuki Kakushima¹, Hitoshi Wakabayashi¹, Kazuo Tsutsui¹, Hiroshi Iwai¹ (Tokyo Tech.¹, AIST²)

Keywords:GaNパワーデバイス,シミュレーション,オン抵抗