The 61st JSAP Spring Meeting, 2014

Presentation information

Oral presentation

13. Semiconductors A (Silicon) » 13.4 Devices/Integration Technologies

[19a-F12-1~13] 13.4 Devices/Integration Technologies

Wed. Mar 19, 2014 9:00 AM - 12:30 PM F12 (F408)

9:15 AM - 9:30 AM

[19a-F12-2] Evaluation of Self-Heating Effects in Nanoscale Bulk and Ultra-Thin BOX SOI MOSFETs Using Four-Terminal Gate Resistance Technique

○(P)Tsunaki Takahashi1, Takeo Matsuki3, Takahiro Shinada2,3, Yasuo Inoue3, Ken Uchida1 (Dept. Electrical and Electronics Eng., Keio Univ.1, Nanoelectronics RI, AIST2, TIA Headquaters, AIST3)

Keywords:自己加熱効果,極薄膜BOX SOI MOSFET,4端子ゲート抵抗法