[20a-D9-1~10] 13.1 Basic Properties, Surface and Interface Phenomena, and Simulation

[20a-D9-2] Effect of Device structure on Mg₂Si-Si Hetero-junction Tunneling FET

^○Yan Wu¹, Hiroki Hasegawa¹, Kuniyuki Kakushima², Takanobu Watanabe³, Yoshinori Kataoka², Akira Nishiyama², Nobuyuki Sugii², Hitoshi Wakabayashi², Kazuo Tsutsui¹, Kenji Natori¹, Hiroshi Iwai¹ (Tokyo Tech. FRC¹, Tokyo Tech. IGSSE², Waseda Univ.³)

Keywords:Tunneling FET,Semiconductor silicide