[15p-2M-1~11] Quantum Silicon Technology from the ground up

[15p-2M-2] A 20k-spin Ising Chip for Combinatorial Optimization Problem with CMOS Annealing

〇Masanao Yamaoka¹, Chihiro Yoshimura¹, Masato Hayashi¹, Takuya Okuyama¹, Hidetaka Aoki¹, Hiroyuki Mizuno¹ (1.Hitachi, Ltd., Research & Development Group)

Keywords:Ising model,CMOS annealing,Combinarotiral optimization problem

A new computing architecture using Ising model that effectively solves combinatorial optimization problems is proposed, and a 20k-spin Ising chip is fabricated in 65nm process. The chip maps problems to an Ising model, a model to express the behavior of magnetic spins, and solves the problems by its own convergence property. The convergence is performed by CMOS circuits operations. The Ising chip achieves 100MHz operation and the operation to solve problems using Ising model is confirmed. The power efficiency of the chip is 1800-times higher than that of the conventional Neumann computers.