Statistical Analysis of Four Write Stability Metrics in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Low Supply Voltage Down to 0.4V

Hao Qiu

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13 Semiconductors » 13.5 Semiconductor devices and related techologies

[12p-A23-1~11] 13.5 Semiconductor devices and related techologies

Thu. Mar 12, 2015 2:00 PM - 5:30 PM A23 (6A-216)

5:00 PM - 5:15 PM

▼ [12p-A23-10] Statistical Analysis of Four Write Stability Metrics in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Low Supply Voltage Down to 0.4V

〇(D)Hao Qiu¹, Tomoko Mizutani¹, Yoshiki Yamamoto², Hideki Makiyama², Tomohiro Yamashita², Hidekazu Oda², Shiro Kamohara², Nobuyuki Sugii², Takuya Saraya¹, Masaharu Kobayashi¹, Toshiro Hiramoto¹ (1.IIS, Univ. of Tokyo, 2.LEAP)

Keywords:SOTB SRAM cells,write noise margin, variability,low supply voltage