The 77th JSAP Autumn Meeting, 2016

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[14a-B13-1~10] 13.5 Semiconductor devices and related technologies

Wed. Sep 14, 2016 9:00 AM - 12:15 PM B13 (Exhibition Hall)

Hitoshi Wakabayashi(Titech)

11:15 AM - 11:30 AM

[14a-B13-7] Measurement of SRAM Power-up Data using an Addressable Cell Array Test Structure

KIYOSHI TAKEUCHI1, TOMOKO MIZUTANI1, HIROFUMI SHINOHARA2, TAKUYA SARAYA1, MASAHARU KOBAYASHI1, TOSHIRO HIRAMOTO1 (1.Univ. Tokyo, 2.Waseda Univ.)

Keywords:SRAM

SRAM data just after power-up, useful for PUF applications, were measured using an addressable cell array test structure, which was originally designed for transistor and cell variability evaluation. It was found that the data were influenced by address switching noise and “memory effect.” Such adverse effects could be minimized by initializing the internal node voltage before each power-up events.