The 77th JSAP Autumn Meeting, 2016

Presentation information

Poster presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[14p-P5-1~13] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

Wed. Sep 14, 2016 1:30 PM - 3:30 PM P5 (Exhibition Hall)

1:30 PM - 3:30 PM

[14p-P5-6] Evaluation of resister characteristics for chip on chip bonding using "AlSi/TiN" bumps and concave shape electrode with ACP

〇(B)Takahiro Mitsuishi1, Masahiro Akiyama1, Dali Zhang2, Myung-Jae Lee2, Edoardo Charbon2 (1.NIT, 2.TUDelft)

Keywords:3D integration

The 3D bonding for COC(chip on chip) is required for high speed and miniaturization.
We propose using Al/TiN bumps and ACP for making COC structure.
The Al/TiN bumps has compatibility for CMOS process.
The ACP is cheap and easy for making 3D connection at low temperature.
We use 2 chip that are bottom side chip and top side chip.
The bottom side chip have Al/TiN bumps.
The top side chip have concave electrode that is AlSi.
In this time, we did 3D integration with them.
And these connection is fine.