The 77th JSAP Autumn Meeting, 2016

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[16a-B10-1~13] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

Fri. Sep 16, 2016 9:00 AM - 12:15 PM B10 (Exhibition Hall)

Kuniyuki Kakushima(Titech)

12:00 PM - 12:15 PM

[16a-B10-13] Investigation of productivity in device process of minimal fab

Sommawan Khumpuang1,2, Fumito Imura1,2, Shiro Hara1,2 (1.AIST, 2.MINIMAL)

Keywords:semiconductor manufacturing, MOSFET

The result of MOSFET fabrication using minimal fab's clean-localized system confirms the clean-performance of the system. We have measured the clean levels in process chamber of a machine and the wafer transfer system. Both are resulting in ISO class 4, while the clean level of the circumstance is in ISO class 9. We fabricate a traditional MOSFET using minimal fab for the entire process. The measured density of interface states obtained of the MOSFET was 7.7x10^10 cm^-2 and an off-leak current was 4x10^-12A which is acceptable contamination level of the system. Due to a compact size of the minimal machine, the wafer transfer distance is minimized. The process efficiency in terms of wafer transfer time and wafer waiting time is analyzed.