2016年 第77回応用物理学会秋季学術講演会

講演情報

一般セッション(口頭講演)

13 半導体 » 13.4 Si系プロセス・Si系薄膜・配線・MEMS・集積化技術

[16a-B10-1~13] 13.4 Si系プロセス・Si系薄膜・配線・MEMS・集積化技術

2016年9月16日(金) 09:00 〜 12:15 B10 (展示控室1)

角嶋 邦之(東工大)

12:00 〜 12:15

[16a-B10-13] Investigation of productivity in device process of minimal fab

Khumpuang Sommawan1,2、Imura Fumito1,2、Hara Shiro1,2 (1.AIST、2.MINIMAL)

キーワード:semiconductor manufacturing, MOSFET

The result of MOSFET fabrication using minimal fab's clean-localized system confirms the clean-performance of the system. We have measured the clean levels in process chamber of a machine and the wafer transfer system. Both are resulting in ISO class 4, while the clean level of the circumstance is in ISO class 9. We fabricate a traditional MOSFET using minimal fab for the entire process. The measured density of interface states obtained of the MOSFET was 7.7x10^10 cm^-2 and an off-leak current was 4x10^-12A which is acceptable contamination level of the system. Due to a compact size of the minimal machine, the wafer transfer distance is minimized. The process efficiency in terms of wafer transfer time and wafer waiting time is analyzed.