The 63rd JSAP Spring Meeting, 2016

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[20a-S422-1~12] 13.5 Semiconductor devices and related technologies

Sun. Mar 20, 2016 9:00 AM - 12:15 PM S422 (S4)

Masumi Saitoh(TOSHIBA)

9:45 AM - 10:00 AM

[20a-S422-4] Reliable and Compact PUF Circuitry Using Poly-Crystalline-Si Channel FinFET Co-Integrated with Crystalline-Si Channel FinFET and Its Evaluation Method

Shinichi Ouchi1, Yongxun Liu1, Yohei Hori1, Toshifumi Irisawa1, Hiroshi Fuketa1, Yukinori Morita1, Shinji Migita1, Takahiro Mori1, Tadashi Nakagawa1, Junichi Tsukada1, Hanpei Koike1, Meishoku Masahara1, Takashi Matsukawa1 (1.AIST)

Keywords:SRAM PUF,poly-crystalline-Si-channel FinFET,Noise Margin

We propose an SRAM-PUF circuit using a poly-crystalline-Si-channel FinFET which is integrated together with logic circuits by an identical process. The poly-Si device has wide variation and stabilizes the operation of PUF which is strongly affected by external noise. By fabrication and analysis with newly defined SRAM-PUF noise margin, it was found that the proposed SRAM PUF stably operated with an intra-PUF hamming distance improved to 1/3.4 of that of the conventional one.