[5a-C11-1~11] 13.3 Insulator technology

▼ [5a-C11-3] Near-interface border traps characterization for GeO₂/Ge gate stacks grown by low and high temperature thermal oxidation by using deep-level transient spectroscopy

〇(M2)Weichen Wen¹, Taisei Sakaguchi¹, Keisuke Yamamoto¹, Dong Wang¹, Hiroshi Nakashima² (1.IGSES, Kyushu Univ., 2.GIC, Kyushu Univ.)

Keywords:Ge MOS, border-trap, interface-trap

We established a method of characterizing border-traps in GeO₂/Ge gate stacks using deep-level transient spectroscopy, and investigated the density of border-traps (N_BT). The N_BT in p-MOS grown by low temperature oxidation is smaller than that by high temperature oxidation. By contrast, the N_BT in n-MOS is almost the same regardless of the oxidation temperature. In addition, the N_BT in p-MOS is drastically decreased by Al post metallization annealing (Al-PMA), but the N_BT in n-MOS is not decreased. These results suggest that the species of BT in n-MOS are different from that of p-MOS.