2017年第78回応用物理学会秋季学術講演会

講演情報

一般セッション(口頭講演)

13 半導体 » 13.3 絶縁膜技術

[5a-C11-1~11] 13.3 絶縁膜技術

6.1と13.3と13.5のコードシェアセッションあり

2017年9月5日(火) 09:00 〜 12:00 C11 (事務室1)

小山 正人(東芝)、大田 晃生(名大)

09:30 〜 09:45

[5a-C11-3] Near-interface border traps characterization for GeO2/Ge gate stacks grown by low and high temperature thermal oxidation by using deep-level transient spectroscopy

〇(M2)Weichen Wen1、Taisei Sakaguchi1、Keisuke Yamamoto1、Dong Wang1、Hiroshi Nakashima2 (1.IGSES, Kyushu Univ.、2.GIC, Kyushu Univ.)

キーワード:Ge MOS, border-trap, interface-trap

We established a method of characterizing border-traps in GeO2/Ge gate stacks using deep-level transient spectroscopy, and investigated the density of border-traps (NBT). The NBT in p-MOS grown by low temperature oxidation is smaller than that by high temperature oxidation. By contrast, the NBT in n-MOS is almost the same regardless of the oxidation temperature. In addition, the NBT in p-MOS is drastically decreased by Al post metallization annealing (Al-PMA), but the NBT in n-MOS is not decreased. These results suggest that the species of BT in n-MOS are different from that of p-MOS.