The 78th JSAP Autumn Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[6p-C21-1~20] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

Wed. Sep 6, 2017 1:45 PM - 7:00 PM C21 (C21)

Kuniyuki Kakushima(Titech), Masato Sone(Titech)

6:45 PM - 7:00 PM

[6p-C21-20] Synergy between Minimal Fab. System and Clean Unit System Platform (CUSP)

Akira Ishibashi1,5,6, Junji Matsuda2, Nobutoshi Noguchi3, Tsukio Etoh4, Yoshihisa Ohashi5, Shiro Hara6 (1.RIES, Hokkaido Univ., 2.Hiei Kensetsu, 3.Ishibashi Arch. Assc, 4.Kindai Setsubi Skkei, 5.CsTEC Corp., 6.AIST)

Keywords:CUSP, Minimal Fab. System, Cleanroom

Clean versatile environments having small footprint, low power-consumption, and high cost-performance can be realized with clean unit system platform (CUSP), while development of minimal fab system with the aim of flexible semiconductor production to cope with high-variation and low-volume production is advancing at a rapid pace. Thus, CUSP is of potential interest to assist the minimal fab systems.