The 78th JSAP Autumn Meeting, 2017

Presentation information

Oral presentation

8 Plasma Electronics » 8.4 Plasma etching

[7p-A402-1~6] 8.4 Plasma etching

Thu. Sep 7, 2017 1:15 PM - 2:45 PM A402 (402+403)

Tetsuya Tatsumi(Sony)

1:15 PM - 1:30 PM

[7p-A402-1] Surface composition analysis of SiN/SiO2 deep holes fabricated by plasma etching

Taku Iwase1, Kazuhiro Karahashi2, Satoshi Hamaguchi2 (1.Hitachi R&D, 2.Osaka Univ.)

Keywords:plasma, etching, high aspect ratio

Device architecture has shown a tendency to change from a planar type to a three-dimensional (3D) type because the integration of memory devices has faced a scaling limitation. 3D-NAND device architecture was realized by fabricating holes in stacked layers. In this study, a surface reaction mechanism was investigated by considering the surface composition after fabricating holes in SiN/SiO2 stacked layers using the HBr/N2/fluorocarbon based gas plasma process. It was found that the adhesion amount of bromine, which is assumed to be derived from ammonium bromide, to the inner wall of the holes with the sample processed at the substrate temperature of 20 degrees C was larger than the sample of 60 degrees C process. Both the processing speed and the perpendicularity were high with the sample of 20 degrees C process, adhesion amount of bromine is suggest be important to form the hole profile.